![]() The proposed architecture works for all the general The proposed circuit is 20.08% area-efficient and 33.49% delayĮfficient than the existing best known Shift Add by ConstantĪrchitecture. This converter can be used for 2-ĭigit BCD number to be translated from a 7-bit binary number. Work, a new algorithm is proposed to provide hardware supportįor binary to BCD conversion. Readable that is to be converted from binary number. So, BCD is needed to make machine results human Numbers whereas binary is the number system that is recognizedīy machines. BCD (Binary Coded Decimal) is veryĬommon in digital computational devices which display decimal The application which make devices easy to use and feasible Digital devices use decimal arithmetic in most of
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